AN95089 Datasheet, PDF (8/19 Pages) Ramtron International Corporation – BLE Crystal Oscillator Selection and Tuning Techniques

PSoC® 4/PRoC™ BLE Crystal Oscillator Selection and Tuning Techniques
Decimal Value of Bits 6-0
0
1
2
Capacitance Value C2
3.6900 pF
3.7911 pF
3.8922 pF
…….
……..
127
16.428 pF
Bit 7 is used for coarse control of the capacitance value at the XO node.
Bit 7 = 0 means that no additional capacitance is turned ON at the XO node.
Bit 7 = 1 means that an additional capacitance of 8.1 pF is turned ON at the XO node.
C_L and Clock Accuracy
Changes in C1 and C2 result in a change in CL. Therefore, both values should be changed to tune the crystal properly.
Even though there is no one-to-one look-up table to relate a change in capacitance value to a change in the ppm
accuracy, a general practice is mentioned below:
 If the ppm is negative (i.e., the measured frequency is less than 24 MHz), then decrease the capacitance trim
value on XI and XO because a smaller CL value results in an increase in fp according to Equation 2
 If the ppm is positive (i.e., the measured frequency is more than 24 MHz), then increase the trim capacitance
value because a larger CL value results in a decrease in fp according to Equation 2:
For optimal phase noise, the total capacitance on the XI pin should be 0.8 times the total capacitance on the XO pin.
5 Is Tuning Required for Each Board?
Table 1 and Figure 6 show the ppm variation measured for the same load cap value on 14 boards with the same PCB
layout after tuning the CL for one board.
Table 1. ppm Variation Across Boards for the Same CL
Board
1
2
3
Measured Frequency
23999998
23999912
24000051
-0.08
-3.66
2.12
ppm
4
23999859
5
23999965
6
23999912
7
23999840
8
24000064
9
23999951
10
23999968
11
24000000
12
24000061
-5.87
-1.45
-3.66
-6.66
2.66
-2.04
-1.33
0
2.54
13
23999800
14
23999867
-8.33
-5.54
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Document No. 001-95089 Rev. *A
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