AN95089 Datasheet, PDF (5/19 Pages) Ramtron International Corporation – BLE Crystal Oscillator Selection and Tuning Techniques

PSoC® 4/PRoC™ BLE Crystal Oscillator Selection and Tuning Techniques
2.4 Drive Level
This is a measure of the amount of power dissipated (in µW) across the crystal. The maximum drive level is the
maximum power a crystal can dissipate while still maintaining the specified performance. A high drive-level causes
problems such as instability and aging. The drive level should be considered in your design to avoid premature aging
and damage to the crystal. You should choose a crystal whose drive level specification meets your design drive level
requirement.
2.5 PPM Error
The crystal clock accuracy is usually defined in parts per million (ppm), which means the inaccuracy in the number of
clock cycles measured per 10⁶ (1 million) clock cycles.
Equation 4:
For example, if a 24-MHz crystal oscillator provides a clock of 23.999928 MHz, then the clock accuracy is -72/24 = -3
ppm
There are many reasons for ppm variation. Some of these are discussed below:
Initial Tolerance (ppm): The deviation from the nominal crystal frequency for different devices under identical
conditions (temperature, PCB layout, voltage, etc). This is a datasheet parameter.
Temperature Drift (ppm): The deviation from the nominal crystal frequency over temperature.
Aging (ppm/year): The cumulative change in the frequency of oscillation experienced by a crystal over a year. The
variation due to aging may be different in different years. This may be +/- 1 ppm for the first year and +/- 20 ppm after
15 years.
Pullability: This is the change in crystal oscillator frequency due to a change in the load capacitance. It is typically
20 ppm/pF. The parasitic load capacitance varies between 2.5 to 3.5 pF, which can cause the ppm to shift outside the
BLE specification limit of +/-50 ppm. Therefore, the board parasitic capacitance should also be considered while
choosing the load capacitor value for the crystal.
Parasitic Capacitance: Stray capacitances from the PCB and pin input add to the overall parasitic capacitance seen
by the crystal. This parasitic capacitance changes the load capacitance value.
3 Effects of Inaccurate ECO Crystal Frequency on RF Performance
The data transmitted over BLE has a symbol rate of 1 mega-symbol per second (symbol timing of 1 µs), where a
symbol refers to one bit of baseband signal that modulates the carrier. The symbol timing accuracy should be better
than ± 50 ppm. In addition, the deviation in the RF center frequency during a packet transmission should not exceed
± 150 kHz (See Appendix: Frequency Error (Transmit Center Frequency Tolerance)).The symbol timing and the
centre frequency are both derived from the 24-MHz crystal oscillator. Therefore, you should use a crystal that meets
the BLE specification because the deviation in the crystal oscillator clock directly impacts the RF performance.
A higher RF center-frequency deviation of the transmitter increases transmission leakages in adjacent channels that
result in the following:
 Higher interference for receivers in adjacent channels
 Possibility of not meeting the radio specifications
 Increase in the spurious spillover in the adjacent channel that could result in failures in a band-edge test
A higher frequency-deviation of the receiver with respect to the transmitter could cause a part of the received energy
to fall outside the bandwidth of the baseband filter. This causes valid signal energy to be lost in the filter and results in
a reduced sensitivity (and hence a reduced range).
For GFSK receivers, the frequency deviation also causes a DC shift in the demodulated output and could result in the
decoded symbols to be erroneous This results in a higher PER (packet error rate) and reduced sensitivity.
Apart from these, a higher frequency-deviation of the receiver makes the receiver move closer to the adjacent
channel. Consequently, signals in adjacent channels impact the reception, thus reducing the selectivity.
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Document No. 001-95089 Rev. *A
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