AN95089 Datasheet, PDF (6/19 Pages) Ramtron International Corporation – BLE Crystal Oscillator Selection and Tuning Techniques

PSoC® 4/PRoC™ BLE Crystal Oscillator Selection and Tuning Techniques
The most important measure of RF performance is the receiver sensitivity. For BLE, receiver sensitivity is the lowest
power-level up to which the receiver can receive packets with a maximum of 30.8 percent packet error rate (PER).
Internal receiver characterization has shown that the receiver sensitivity can degrade by as much as 1 dBm if the
ECO clock drifts beyond ± 20 ppm.
Another important RF performance parameter is the Carrier to Interference (C/I) ratio xpressed in dB. This ratio
indicates how strong or weak can the interferer signal be as compared to the carrier signal such that PER is
≤ 30.8 percent. A more negative C/I ratio is better as it means that even if the carrier power level is much weaker than
the interference power level (i.e., strong interference), the receiver can still receive packets with a maximum of
30.8 percent PER. The C/I ratio can degrade by as much as 5 to 8 dBm if the ECO clock is inaccurate by -20 ppm.
While the chosen crystal may have a good accuracy, the ppm may vary due to the reasons mentioned in Crystal
Oscillator Basics. This requires the ability to tune the ppm to ensure a good RF performance.
4 Crystal Tuning Technique for ECO
Tuning is the method of correcting any inaccuracy in the crystal clock that may occur in the system. Tuning aims at
improving the accuracy of the generated frequency by adjusting the load capacitance value seen by the crystal
oscillator circuit.
Typically, tuning is done by directly adjusting the externally mounted load capacitance values or by having an
external variable capacitor that can offset the mounted load capacitance value. However, external capacitors add
additional system cost.
PSoC 4/PRoC BLE devices have internal programmable trim capacitances (instead of an externally mounted load
capacitance) on pins XI and XO (shown in Figure 5) as a part of the oscillator circuit. These load capacitances are
tuned by firmware to correct the load capacitance offset, and therefore the frequency.
Figure 5. Internal Programmable Trim Capacitors in PSoC 4/PRoC BLE Devices
C1
C2
R
PSoC4/PRoC BLE
CPIN1
XI
XO
CPCB1
XTAL
CPCB2
CPIN2
For tuning, the 24-MHz ECO clock is routed out of the chip to a GPIO to measure the clock accuracy. The clock
accuracy is measured with a high-precision frequency measurement instrument like a universal time interval counter
(Model SR620 from Stanford Research Systems).
Equation 4 gives the clock ppm deviation.
The clock inaccuracy is corrected by changing the value of the internal trimmable capacitances C1 and C2 using
register writes (which effectively change the overall CL seen by the crystal) to bring the clock to the required ppm.
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Document No. 001-95089 Rev. *A
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