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HYS64T256020EU-25F-B Datasheet, PDF (4/60 Pages) Qimonda AG – 240-Pin unbuffered DDR2 SDRAM Modules
Internet Data Sheet
HYS[64/72]T256020EU-[25F/2.5/3/3S/3.7]-B
Unbuffered DDR2 SDRAM Module
1.2
Description
The QIMONDA HYS[64/72]T256020EU-[25F/2.5/3/3S/3.7]-B
module family are unbuffered DIMM modules “UDIMMs” with
30 mm height based on DDR2 technology. DIMMs are
available as non-ECC modules in 256M × 64 (2 GB) and as
ECC modules in 256M × 72 (2 GB) organization and density,
intended for mounting into 240-pin connector sockets.
The memory array is designed with 1-Gbit Double-Data-Rate-
Two (DDR2) Synchronous DRAMs. Decoupling capacitors
are mounted on the PCB board. The DIMMs feature serial
presence detect based on a serial E2PROM device using the
2-pin I2C protocol. The first 128 bytes are programmed with
configuration data and are write protected; the second
128 bytes are available to the customer.
Product Type1)
Compliance Code2)
TABLE 2
Ordering Information for RoHS Compliant Products
Description
SDRAM
Technology
PC2–6400
HYS64T256020EU–25F–B 2 GB 2R×8 PC2–6400U–555–12–E0
2 Ranks, Non-ECC
1 Gbit (×8)
HYS72T256020EU–25F–B 2 GB 2R×8 PC2–6400E–555–12–G0
2 Ranks, ECC
1 Gbit (×8)
PC2–6400
HYS64T256020EU–2.5–B 2 GB 2R×8 PC2–6400U–666–12–E0
2 Ranks, Non-ECC
1 Gbit (×8)
HYS72T256020EU–2.5–B 2 GB 2R×8 PC2–6400E–666–12–G0
2 Ranks, ECC
1 Gbit (×8)
PC2–5300
HYS64T256020EU–3–B
2 GB 2R×8 PC2–5300U–444–12–E0
2 Ranks, Non-ECC
1 Gbit (×8)
HYS72T256020EU–3–B
2 GB 2R×8 PC2–5300E–444–12–G0
2 Ranks, ECC
1 Gbit (×8)
PC2–5300
HYS64T256020EU–3S–B
2 GB 2R×8 PC2–5300U–555–12–E0
2 Ranks, Non-ECC
1 Gbit (×8)
HYS72T256020EU–3S–B
2 GB 2R×8 PC2–5300E–555–12–G0
2 Ranks, ECC
1 Gbit (×8)
PC2–4200
HYS64T256020EU–3.7–B 2 GB 2R×8 PC2–4200U–444–12–E0
2 Ranks, Non-ECC
1 Gbit (×8)
HYS72T256020EU–3.7–B 2 GB 2R×8 PC2–4200E–444–12–G0
2 Ranks, ECC
1 Gbit (×8)
1) All Product Type numbers end with a place code, designating the silicon die revision. Example: HYS72T256020EU–3.7–B, indicating Rev.
“B” dies are used for DDR2 SDRAM components. For all Qimonda DDR2 module and component nomenclature see Chapter 6 of this data
sheet.
2) The Compliance Code is printed on the module label and describes the speed grade, for example “PC2–4200U–444–12–E0”, where
4200U means Unbuffered DIMM modules with 4.26 GB/sec Module Bandwidth and “444-12” means Column Address Strobe (CAS)
latency = 4, Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest JEDEC SPD Revision 1.2 and
produced on the Raw Card “B”.
Rev. 1.0, 2006-10
4
10262006-SX8C-DEY8