HYS64T256020EU-25F-B Datasheet, PDF (39/60 Pages) Qimonda AG – 240-Pin unbuffered DDR2 SDRAM Modules

Internet Data Sheet
HYS[64/72]T256020EU-[25F/2.5/3/3S/3.7]-B
Unbuffered DDR2 SDRAM Module
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
Description
Programmed SPD Bytes in EEPROM
Total number of Bytes in EEPROM
Memory Type (DDR2)
Number of Row Addresses
Number of Column Addresses
DIMM Rank and Stacking Information
Data Width
Not used
Interface Voltage Level
t_CK @ CL_MAX (Byte 18) [ns]
t_AC SDRAM @ CL_MAX (Byte 18) [ns]
Error Correction Support (non-ECC, ECC)
Refresh Rate and Type
Primary SDRAM Width
Error Checking SDRAM Width
Not used
Burst Length Supported
Number of Banks on SDRAM Device
Supported CAS Latencies
DIMM Mechanical Characteristics
DIMM Type Information
DIMM Attributes
Component Attributes
t_CK @ CL_MAX -1 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -1 [ns]
t_CK @ CL_MAX -2 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -2 [ns]
t_RP.MIN [ns]
t_RRD.MIN [ns]
t_RCD.MIN [ns]
Rev. 1.0, 2006-10
10262006-SX8C-DEY8
TABLE 26
SPD codes for HYS[64/72]T256020EU–2.5–B
HYS64T256020EU–2.5–B HYS72T256020EU–2.5–B
2 GByte
2 GByte
×64
×72
2 Ranks (×8)
2 Ranks (×8)
PC2–6400U–666
PC2–6400E–666
Rev. 1.2
Rev. 1.2
HEX
80
08
08
0E
0A
61
40
00
05
25
40
00
82
08
00
00
0C
08
70
01
02
00
07
30
45
3D
50
3C
1E
3C
HEX
80
08
08
0E
0A
61
48
00
05
25
40
02
82
08
08
00
0C
08
70
01
02
00
07
30
45
3D
50
3C
1E
3C
39