HYS72T512020HR Datasheet, PDF (29/37 Pages) Qimonda AG – 240-Pin Registered-DDR2-SDRAM Modules

Internet Data Sheet
HYS72T512020HR–[3.7/5]–A
Registered DDR2 SDRAM Modules
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
Description
Programmed SPD Bytes in EEPROM
Total number of Bytes in EEPROM
Memory Type (DDR2)
Number of Row Addresses
Number of Column Addresses
DIMM Rank and Stacking Information
Data Width
Not used
Interface Voltage Level
t_CK @ CL_MAX (Byte 18) [ns]
t_AC SDRAM @ CL_MAX (Byte 18) [ns]
Error Correction Support (non-ECC, ECC)
Refresh Rate and Type
Primary SDRAM Width
Error Checking SDRAM Width
Not used
Burst Length Supported
Number of Banks on SDRAM Device
Supported CAS Latencies
DIMM Mechanical Characteristics
DIMM Type Information
DIMM Attributes
Component Attributes
t_CK @ CL_MAX -1 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -1 [ns]
t_CK @ CL_MAX -2 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -2 [ns]
t_RP.MIN [ns]
t_RRD.MIN [ns]
t_RCD.MIN [ns]
Rev. 1.11, 2006-09
03062006-TZ8J-GNDA
TABLE 21
SPD codes for PC2–3200R–333
HYS72T512020HR–5–A
4 GByte
×72
2 Ranks (×4)
PC2–3200R–333
Rev. 1.1
HEX
80
08
08
0E
0B
61
48
00
05
50
60
02
82
04
04
00
0C
08
38
00
01
07
01
50
60
50
60
3C
1E
3C
31