HYS72T512020HR Datasheet, PDF (14/37 Pages) Qimonda AG – 240-Pin Registered-DDR2-SDRAM Modules

Internet Data Sheet
HYS72T512020HR–[3.7/5]–A
Registered DDR2 SDRAM Modules
Parameter
Symbol
Values
TABLE 10
Supply Voltage Levels and DC Operating Conditions
Unit Note
Min.
Nom.
Max.
Device Supply Voltage
V_DD
1.7
1.8
1.9
V
Output Supply Voltage
V_DDQ
1.7
1.8
1.9
V
1)
Input Reference Voltage
V_REF
0.49 x V_DDQ
0.5 x V_DDQ
0.51 x V_DDQ
V
2)
SPD Supply Voltage
V_DDSPD
1.7
—
3.6
V
DC Input Logic High
V_{IH (DC)}
V_REF + 0.125 —
V_DDQ + 0.3
V
DC Input Logic Low
V_{IL (DC)}
–0.30
—
V_REF – 0.125
V
In / Output Leakage Current
I_L
–5
—
5
µA
3)
1) Under all conditions, V_DDQ must be less than or equal to V_DD
2) Peak to peak AC noise on V_REF may not exceed ± 2% V_REF (DC).V_REF is also expected to track noise variations in V_DDQ.
3) Input voltage for any connector pin under test of 0 V ≤ V_IN ≤ V_DDQ + 0.3 V; all other pins at 0 V. Current is per pin
Rev. 1.11, 2006-09
16
03062006-TZ8J-GNDA