HYB18TC256800BF Datasheet, PDF (19/62 Pages) Qimonda AG – 256-Mbit Double-Data-Rate-Two SDRAM

Internet Data Sheet
HYB18TC256[80/16]0BF
256-Mbit Double-Data-Rate-Two SDRAM
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UH JD GG U
03%7 
Field
BA2
Bits Type¹⁾
16 reg.addr
BA1
15
BA0
14
A
[13:0] w
1) w = write only
TABLE 17
EMR(3) Programming Extended Mode Register Definition(BA[2:0]=011_B)
Description
Bank Address[2]
Note: BA2 is not available on 256Mbit and 512Mbit components
0_B BA2 Bank Address
Bank Adress[1]
1_B BA1 Bank Address
Bank Adress[0]
1_B BA0 Bank Address
Address Bus[13:0]
Note: A13 is not available for 256 Mbit and x16 512 Mbit configuration
00000000000000_BA[13:0] Address bits
Input Pin
×8 Components
DQ[7:0]
DQS
DQS
RDQS
RDQS
DM
×16 Components
DQ[7:0]
DQ[15:8]
LDQS
LDQS
UDQS
UDQS
LDM
UDM
EMRS(1) Address Bit A10
X
X
0
X
0
X
X
X
X
0
X
0
X
X
Note: X = don’t care; 0 = bit set to low; 1 = bit set to high
Rev. 1.3, 2007-05
19
07182006-DD60-22E6
TABLE 18
ODT Truth Table
EMRS(1) Address Bit A11
X
1
1
0
X
X