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HYS72T256000ER Datasheet, PDF (14/33 Pages) Qimonda AG – 240-Pin Registered DDR2 SDRAM Modules
Internet Data Sheet
HYS72T256000ER-[3.7/5]-B
Registerd DDR2 SDRAM Module
3.2
DC Operating Conditions
This chapter contains the DC operating conditions tables.
Parameter
Symbol
Values
TABLE 10
Operating Conditions
Unit
Note
Min.
Max.
Operating temperature (ambient)
DRAM Case Temperature
Storage Temperature
Barometric Pressure (operating & storage)
TOPR
TCASE
TSTG
PBar
0
0
– 50
+69
+65
+95
+100
+105
°C
°C
°C
kPa
1)2)3)4)
5)
Operating Humidity (relative)
HOPR
10
90
%
1) DRAM Component Case Temperature is the surface temperature in the center on the top side of any of the DRAMs.
2) Within the DRAM Component Case Temperature Range all DRAM specifications will be supported
3) Above 85 °C DRAM Case Temperature the Auto-Refresh command interval has to be reduced to tREFI = 3.9 µs
4) When operating this product in the 85 °C to 95 °C TCASE temperature range, the High Temperature Self Refresh has to be enabled by
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of IDD6 by approximately 50%.
5) Up to 3000 m.
Parameter
Symbol
Values
TABLE 11
Supply Voltage Levels and DC Operating Conditions
Unit Note
Min.
Typ.
Max.
Device Supply Voltage
VDD
1.7
1.8
1.9
V
Output Supply Voltage
VDDQ
1.7
1.8
1.9
V
1)
Input Reference Voltage
VREF
0.49 × VDDQ
0.5 × VDDQ
0.51 × VDDQ
V
2)
SPD Supply Voltage
VDDSPD
1.7
—
3.6
V
DC Input Logic High
VIH(DC)
VREF + 0.125 —
VDDQ + 0.3
V
DC Input Logic Low
VIL (DC)
– 0.30
—
VREF – 0.125
V
In / Output Leakage Current
IL
–5
—
5
µA
3)
1) Under all conditions, VDDQ must be less than or equal to VDD
2) Peak to peak AC noise on VREF may not exceed ± 2% VREF (DC).VREF is also expected to track noise in VDDQ.
3) Input voltage for any connector pin under test of 0 V ≤ VIN ≤ VDDQ + 0.3 V; all other pins at 0 V. Current is per pin
Rev. 1.0, 2006-10
14
10202006-EHWJ-OT02