PACE1750AE Datasheet, PDF (24/25 Pages) Pyramid Semiconductor Corporation – SINGLE CHIP, 20MHz to 40MHz, ENHANCED CMOS 16-BIT PROCESSOR

PACE1750AE
CASE OUTLINE Z:
68-Pin Pin Grid Array (PGA) (Ordering Code PG)
Inches
.016
.020
.040
.050
.059
.060
.098
.100
.120
.150
.170
1.010
1.089
1.160
mm
0.41
0.50
1.01
1.27
1.49
1.52
2.49
2.54
3.04
3.81
4.32
25.65
27.66
29.46
NOTES:
1) Dimensions are in inches.
2) Metric equivalents are given for general information only.
3) Unless otherwise specified, tolerances are .02 (0.5 mm) for two place decimals and .005 (0.13 mm) for three place decimals.
4) Corners except pin number 1 (ref.) can be either rounded or square.
5) All pins must be on the .100" grid.
Document # MICRO-2 REV G
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