PM6388 Datasheet, PDF (224/345 Pages) PMC-Sierra, Inc – Octal E1 Framer

DATA SHEET
PMC-1971019
ISSUE 6
PM6388 EOCTL
OCTAL E1 FRAMER
Register 062H, 0E2H, 162H, 1E2H, 262H, 2E2H ,362H, 3E2H: TPSC
Channel Indirect Address/Control
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
R/WB
A6
A5
A4
A3
A2
A1
A0
Default
0
0
0
0
0
0
0
0
This register allows the µP to access the internal TPSC registers addressed by
the A[6:0] bits and perform the operation specified by the R/WB bit. Writing to
this register with a valid address and R/WB bit initiates an internal µP access
request cycle. The R/WB bit selects the operation to be performed on the
addressed register: when R/WB is set to a logic 1, a read from the internal TPSC
register is requested; when R/WB is set to a logic 0, a write to the internal TPSC
register is requested.
PROPRIETARY and CONFIDENTIAL to PMC-Sierra Inc. and for its customers’ internal use
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