TDA8798 Datasheet, PDF (9/24 Pages) NXP Semiconductors – Dual 8-bit, 100 Msps A/D converter with DPGA

Philips Semiconductors
Dual 8-bit, 100 Msps A/D converter with
DPGA
Objective specification
TDA8798
Table 2 Abbreviations
SYMBOL
GCR1
GCR2
SISR
X
DESCRIPTION
DPGA1 gain control register value
DPGA2 gain control register value
Serial interface shift register value
can be either logic state 0 or logic
state 1
rising edge
falling edge
U
can be either undefined logic state X
rising edge or falling edge
Di
Data input
Table 3 TE truth table
TE
ADC TRACK-AND-HOLD
0
track-and-hold enabled
1
track enabled
Table 4 SR truth table
SR
ADC DIGITAL OUTPUT SLEW RATE
0
maximum
1
minimum
Table 5 DPGAEN truth table
DPGAEN
0
1
DPGA FUNCTIONALITY
enabled
disabled
Table 6 Gain Control
GAIN CONTROL
REGISTER VALUE
000000
000001
000010
...
...
...
111110
111111
GAIN (dBV)
0.00
0.54
1.08
...
...
...
33.46
34.00
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V_DDA
V_DDD
V_DDO
∆V_DDX
V_i(VIN)
I_O
T_stg
T_amb
T_j
PARAMETER
analog supply voltage
digital supply voltage
output stage supply voltage
supply voltage differences between
V_DDA and V_DDD
V_DDO and V_DDD
V_DDA and V_DDO
input voltage range on VIN1 and VIN2
(pins 10 and 7)
output current
storage temperature
ambient temperature
junction temperature
CONDITIONS
referenced to V_SSA
MIN.
−0.3
−0.3
−0.3
MAX.
+7.0
+7.0
+7.0
UNIT
V
V
V
−1.0 +1.0 V
−1.0 +1.0 V
−1.0 +1.0 V
−0.3 +7.0 V
−
10
mA
−55
+150 °C
0
70
°C
−
104
°C
1999 Sep 16
9