TDA8051 Datasheet, PDF (9/24 Pages) NXP Semiconductors – QPSK receiver

Philips Semiconductors
QPSK receiver
Product specification
TDA8051
SYMBOL
PARAMETER
CONDITIONS
V_1(I-Q)
DC output level on
pin I-Q_OUT
R_o(dif)
output differential resistance
Overall: R_s = 75 Ω/R_i = 4 kΩ unless otherwise specified
V_o
voltage output on
see Fig.8
pins I_OUT and Q_OUT
LO_lev
LO level on
pins I_OUT and Q_OUT
see Fig.8
S_o
∆G_I-Q
spurious emission on
pins I_OUT and Q_OUT
gain error on
pins I_OUT and Q_OUT
f = 0 to 5 MHz; see Fig.8
see Fig.8
AMR
AM rejection in I and Q
channels
guaranteed by design; see
Fig.9
IM3
3rd-order intermodulation
guaranteed by design; see
Fig.10
Voltage Controlled Oscillator (VCO)
f_vco(min)
f_vco(max)
αN_(osc)
min. oscillation frequency
max. oscillation frequency
oscillator phase noise
note 1
note 1
at 10 kHz
at 100 kHz
Phase Locked Loop (PLL)
Step
RD
frequency step size
fixed reference divider ratio
at pin VCO output
RDR
programmable reference
divider ratio
ND
programmable fix main divider
ratio
NDR
main divider ratio
I_(CP)
charge pump current
Crystal oscillator
f_xtal
crystal frequency
r_xtal = 25 to 200 Ω
Z_i
crystal oscillator input
f_xtal = 4 MHz
impedance (absolute value)
V_I(DC)
V_i
DC input level
input level
MIN.
−
−
−
−
−
−
−
−
−
−
−
−
100
−
2
−
128
−
1
600
−
−
TYP. MAX.
3.1 −
460 −
48 −
− −45
−40 −
±1 −
− −40
− −45
88 −
260 −
−75 −
−95 −
− 500
2−
− 80
4−
− 2600
300 −
−4
120 −
0
2.9 −
30 −
UNIT
V
Ω
dBmV
dBc
dBc
dB
dBc
dBc
MHz
MHz
dBc/Hz
dBc/Hz
kHz
−
−
−
−
µA
MHz
Ω
V
mVrms
1999 Aug 20
9