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TDA8051 Datasheet, PDF (2/24 Pages) NXP Semiconductors – QPSK receiver
Philips Semiconductors
QPSK receiver
Product specification
TDA8051
FEATURES
• High operating input sensitivity
• Gain controlled amplifier
• PLL controlled carrier frequency
• Low crosstalk between I and Q channel outputs
• 3-wire transmission bus
• 5 V supply voltage.
APPLICATIONS
• BPSK/QPSK demodulation.
GENERAL DESCRIPTION
This TDA8051 is a monolithic bipolar IC intended for
Quadrature Phase Shift Key (QPSK) demodulation. It
includes:
• Low noise RF and gain controlled amplifier
• Two matched mixers
• Symmetrical Voltage Controlled Oscillator (VCO) with
0 to 90° signal generator whose frequency is controlled
by an integrated Phase Lock Loop (PLL) circuit.
• Two matched amplifiers for output base-band active
filtering and output buffers
The gain control is produced by output level detection
compared with an external pre-fixed reference. The PLL
consists of:
• Divide by four preamplifier
• 12-bit programmable main divider
• Crystal oscillator with 8-bit programmable reference
divider
• Phase/frequency detector combined with charge pump
to drive tuning amplifier
• 30 V output
QUICK REFERENCE DATA
All AC units are RMS values unless otherwise specified.
SYMBOL
VCC
fI(LNA)
VI(LNA)
∆ΦI-Q
∆GI-Q
αCT(I-Q)
IM3
Vo
fstep
fxtal
Tamb
PARAMETER
supply voltage range
input carrier frequency at LNA input
input level at LNA input
phase error between I and Q channels
gain error between I and Q channels
crosstalk between I and Q channels
3rd-order intermodulation distortion in
I and Q channels (0 dBmV at LNA_IN)
voltage output on pin I_OUT and Q_OUT
step at output
crystal frequency
operating ambient temperature
MIN.
4.75
44
−30
−
−
−
−
TYP.
5.00
−
−
±3
±1
−30
−
MAX.
5.25
130
0
−
−
−
−45
UNIT
V
MHz
dBmV
deg
dB
dBc
dBc
−
48
−
dBmV
50
−
250
kHz
1
−
4
MHz
0
−
70
°C
ORDERING INFORMATION
TYPE NUMBER
TDA8751T
NAME
SO32
PACKAGE
DESCRIPTION
plastic small outline package; 32 leads; body width 7.5 mm
VERSION
SOT287-1
1999 Aug 20
2