SA1620 Datasheet, PDF (9/26 Pages) NXP Semiconductors – Low voltage GSM front-end transceiver

Philips Semiconductors
Low voltage GSM front-end transceiver
Product specification
SA1620
AC ELECTRICAL CHARACTERISTICS (continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN¹
LIMITS¹
-3σ
TYP
3σ
MAX^{1 UNITS}
Rx Mixer
PG_C
Power conversion gain⁵
RF = 1800MHz
7.5
+8.5
9.5
dB
–4
S₁₁
Mixer input match at ports INM
and INMX⁴
–13
dB
NF_M
P_-1dB
IIP3
SSB combined noise figure
Input 1dB compression
Input third order intercept
10
–7.3
0
2
4
dB
dBm
dBm
IIP3/∆t Input third order intercept
0.005
dB/°C
IIP2
Input second order intercept
19
dBm
G_RFM-IF
G_LOfloor
G_LO-IF
G_LO-RFM
G_LO-RF1
RF feedthrough
LO floor feedthrough
LO feedthrough to IF
LO to mixer input feedthrough
LO to RF LNA1 input
feedthrough
400MHz
400MHz
1.3GHz
1.3GHz
1.3GHz
–26
dB
–30
dB
–16
dB
–50
dBm
–65
dBm
G_LNA1-2
LNA1 output to LNA2 input
feedthrough
400MHz
1290-1760MHz
–41
–26
dB
G_LNA2-M
LNA2 output to mixer input
feedthrough
1290-1760MHz
–23
dB
G_LNA1-M
LNA1 output to mixer input
feedthrough
Receiver ⁶
400MHz
1290-1760MHz
–50
–35
dB
Cascaded gain
A,B Logic Level
H,H
23.5 26.5 28.5 30.5 33.5
dB
H,L
6
9
11
13
16
dB
L,H
–8
–5
–3
–1
+2
dB
L,L
–41
–36
–32
+28
–23
dB
Input IP3 @ RFin=–40dBm
H,H
–20
–18
–16
dBm
LO input
Z_IN
P_IN
A_SAT
Input impedance
(each single-ended input)
Input power
Transistor saturation limit,
max input amplitude
1.3GHz
–25⁷
35-j97
–15
500
Ω
dBm
mV
Tx IF input
|Z_IN|
Input impedance
P_IN
Input power
Tx RF output
400MHz
2
kΩ
–20
dBm
P_OUT
R546 = 240Ω,
V_CCTx1,2 = 3V
5
7.5
8.5
9.5
dBm
NOTES:
1. Due to our automatic test equipment accuracy and repeatability test limits may not reflect the ultimate device performance. Standard
deviations are calculated from characterization data.
2. If the LNA1 is not needed, connect pin V_CCL1 and IN1 to GND. If the LNA2 is not needed, connect pin V_CCL2 and IN2 to GND.
3. Simple L/C elements are needed to achieve specified return loss.
4. The mixer RF inputs (emitters of a Gilbert Cell) may be driven by a symmetrical matching network.
5. Input symmetry suppression is such that the product 6*RF–4*LO is to be suppressed by at least 66dB relative to the wanted IF output when
the input to the mixer is at –32dBm.
6. LNA1, LNA2, and the mixer are cascaded. 0 db insertion loss between LNA1 out to LNA2 in and LNA2 out to mixer in.
7. Lowering the LO input power (P_IN) from TYP to MIN will lower the mixer gain (PG_C) by 1 dB.
1997 May 22
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