PSMN2R0-30YLD_15 Datasheet, PDF (9/13 Pages) NXP Semiconductors – N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology

NXP Semiconductors
PSMN2R0-30YLD
N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
10
V_GS
(V)
8
6
4
2
aaa-008409
24 V
15 V
V_DS = 6 V
10⁴
C
(pF)
10³
10²
aaa-008410
C_iss
C_oss
C_rss
0
0
10
20
30
40
50
60
Q_G (nC)
Fig. 13. Gate-source voltage as a function of gate
charge; typical values
10
10^-1
1
10
10²
V_DS (V)
Fig. 14. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
10³
I_S
(A)
10²
10
aaa-008411
003aal160
I_D
(A)
t_rr
t_a
t_b
0
1
150°C
T_j = 25°C
10^-1
0
0.2 0.4 0.6 0.8
1
1.2
V_SD (V)
Fig. 15. Source current as a function of source-drain
voltage; typical values
0.25 I_RM
I_RM
t (s)
Fig. 16. Reverse recovery timing definition
PSMN2R0-30YLD
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved
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