PSMN2R0-30YLD_15 Datasheet, PDF (2/13 Pages) NXP Semiconductors – N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology

NXP Semiconductors
PSMN2R0-30YLD
N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
Symbol
Parameter
T_j
junction temperature
Static characteristics
R_DSon
drain-source on-state
resistance
Dynamic characteristics
Q_GD
gate-drain charge
Q_G(tot)
total gate charge
Source-drain diode
S
softness factor
Conditions
V_GS = 4.5 V; I_D = 25 A; T_j = 25 °C;
Fig. 10
V_GS = 10 V; I_D = 25 A; T_j = 25 °C;
Fig. 10
V_GS = 4.5 V; I_D = 25 A; V_DS = 15 V;
Fig. 12; Fig. 13
V_GS = 4.5 V; I_D = 25 A; V_DS = 15 V;
Fig. 12; Fig. 13
I_S = 25 A; V_GS = 0 V; dI_S/dt = -100 A/µs;
V_DS = 15 V; Fig. 16
[1] Continuous current is limited by package.
Min Typ Max Unit
-55 -
175 °C
-
2.1 2.5 mΩ
-
1.61 2
mΩ
-
6.3 -
nC
-
21.8 -
nC
-
1.02 -
5. Pinning information
Table 2. Pinning information
Pin
Symbol Description
Simplified outline
1
S
source
mb
2
S
source
3
S
source
4
G
mb
D
gate
mounting base; connected to
drain
1234
LFPAK56; Power-
SO8 (SOT669)
Graphic symbol
D
G
mbb076 S
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
PSMN2R0-30YLD
LFPAK56;
Power-SO8
Description
Plastic single-ended surface-mounted package (LFPAK56;
Power-SO8); 4 leads
Version
SOT669
PSMN2R0-30YLD
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved
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