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| PSMN2R0-30YLD_15 Datasheet, PDF (5/13 Pages) NXP Semiconductors – N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology | |||
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NXP Semiconductors
Symbol
Rth(j-a)
10
Zth(j-mb)
(K/W)
Parameter
thermal resistance
from junction to
ambient
PSMN2R0-30YLD
N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
Conditions
Fig. 5
Fig. 6
Min Typ Max Unit
-
50
-
K/W
-
125 -
K/W
aaa-008447
1
δ = 0.5
0.2
10-1 0.1
0.05
P
tp
δ= T
0.02
single shot
tp
t
10-2
10-6
10-5
10-4
10-3
10-2
T
10-1
1
tp (s)
Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
aaa-005750
aaa-005751
Fig. 5.
PCB layout for thermal resistance junction to
ambient 1â square pad; FR4 Board; 2oz copper
Fig. 6.
PCB layout for thermal resistance junction to
ambient minimum footprint; FR4 Board; 2oz
copper
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C
voltage
PSMN2R0-30YLD
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 December 2014
Min Typ Max Unit
30
-
-
V
27
-
-
V
1.2 1.7 2.2 V
© NXP Semiconductors N.V. 2014. All rights reserved
5 / 13
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