PSMN2R0-30YLD_15 Datasheet, PDF (7/13 Pages) NXP Semiconductors – N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology

NXP Semiconductors
PSMN2R0-30YLD
N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
Symbol
Parameter
Conditions
Q_oss
output charge
V_GS = 0 V; V_DS = 15 V; f = 1 MHz;
T_j = 25 °C
Source-drain diode
V_SD
source-drain voltage I_S = 25 A; V_GS = 0 V; T_j = 25 °C; Fig. 15
t_rr
reverse recovery time I_S = 25 A; dI_S/dt = -100 A/µs; V_GS = 0 V;
Q_r
recovered charge
V_DS = 15 V; Fig. 16
[1]
t_a
reverse recovery rise
time
t_b
reverse recovery fall
time
S
softness factor
Min Typ Max Unit
-
31.6 -
nC
-
0.8 1.2 V
-
37.5 -
ns
-
32
-
nC
-
18.6 -
ns
-
18.9 -
ns
-
1.02 -
[1] includes capacitive recovery
150
I_D
10 V 4.5 V
(A)
120
aaa-008405
V_GS = 3 V
6
R_DSon
(mΩ)
5
aaa-008406
4
90
2.8 V
3
60
2
2.6 V
30
1
2.4 V
0
0
0.5
1
1.5
2
2.5
V_DS (V)
0
0 2 4 6 8 10 12 14 16
V_GS (V)
Fig. 7. Output characteristics; drain current as a
Fig. 8. Drain-source on-state resistance as a function
function of drain-source voltage; typical values
of gate-source voltage; typical values
PSMN2R0-30YLD
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved
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