74HC4024N Datasheet, PDF (9/18 Pages) NXP Semiconductors – 7-stage binary ripple counter

Philips Semiconductors
Table 8: Dynamic characteristics …continued
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF; see Figure 7.
Symbol Parameter
Conditions
T_amb = −40 °C to +85 °C
t_PHL, t_PLH propagation delay CP to Q0
propagation delay Qn to Qn+1
see Figure 6
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 6
t_PHL
propagation delay MR to Q0
t_THL, t_TLH output transition time
t_W
CP clock pulse width HIGH or
LOW
MR master reset pulse width
HIGH
t_rem
removal time MR to CP
f_max
maximum clock frequency
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 6
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 6
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 6
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 6
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 6
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 6
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
74HC4024
7-stage binary ripple counter
Min
Typ
Max
Unit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
100
-
20
-
17
-
100
-
20
-
17
-
65
-
13
-
11
-
4.8
-
24
-
28
-
220
ns
44
ns
37
ns
100
ns
20
ns
17
ns
250
ns
50
ns
43
ns
95
ns
19
ns
16
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
MHz
-
MHz
-
MHz
9397 750 13813
Product data sheet
Rev. 03 — 12 November 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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