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74HC4024N Datasheet, PDF (8/18 Pages) NXP Semiconductors – 7-stage binary ripple counter
Philips Semiconductors
74HC4024
7-stage binary ripple counter
12. Dynamic characteristics
Table 8: Dynamic characteristics
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 7.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 °C
tPHL, tPLH propagation delay CP to Q0
see Figure 6
VCC = 2.0 V
-
VCC = 4.5 V
-
VCC = 6.0 V
-
VCC = 5.0 V; CL = 15 pF
-
propagation delay Qn to Qn+1 see Figure 6
47
175
ns
17
35
ns
14
30
ns
14
-
ns
VCC = 2.0 V
-
25
VCC = 4.5 V
-
9
VCC = 6.0 V
-
7
tPHL
propagation delay MR to Q0
see Figure 6
VCC = 2.0 V
-
63
VCC = 4.5 V
-
23
VCC = 6.0 V
-
18
tTHL, tTLH output transition time
see Figure 6
VCC = 2.0 V
-
19
VCC = 4.5 V
-
7
VCC = 6.0 V
-
6
tW
CP clock pulse width HIGH or
see Figure 6
LOW
VCC = 2.0 V
80
17
VCC = 4.5 V
16
6
VCC = 6.0 V
14
5
MR master reset pulse width
HIGH
see Figure 6
VCC = 2.0 V
80
22
VCC = 4.5 V
16
8
VCC = 6.0 V
14
6
trem
removal time MR to CP
see Figure 6
VCC = 2.0 V
50
6
VCC = 4.5 V
10
2
VCC = 6.0 V
9
2
fmax
maximum clock frequency
see Figure 6
VCC = 2.0 V
6.0
27
VCC = 4.5 V
30
82
VCC = 6.0 V
35
98
VCC = 5.0 V; CL = 15 pF
-
90
CPD
power dissipation capacitance
VI = GND to VCC
[1] -
25
80
ns
16
ns
14
ns
200
ns
40
ns
34
ns
75
ns
15
ns
13
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
MHz
-
MHz
-
MHz
-
MHz
-
pF
9397 750 13813
Product data sheet
Rev. 03 — 12 November 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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