SAA7108 Datasheet, PDF (88/202 Pages) NXP Semiconductors – PC-CODEC

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invalid data
or
end of raw VBI line
timing reference code internal header
sliced data
and filling data
timing reference code invalid data
...
00 00 FF 00 00 SAV SDID DC IDI1 IDI2 D_{1_3} D_{1_4} D_{2_1}
... D_{DC_3} D_{DC_4} CS BC FF 00 00 EAV 00 00 ...
... FF 00 00 EAV
ANC header
D_{1_1} D_{1_2}
internal header
sliced data
ANC data output is only filled up
to the Dword boundary
MHB549
00 FF FF DID SDID DC IDI1 IDI2 D_{1_3} D_{1_4} ... D_{DC_3} D_{DC_4} CS BC 00 00 ...
ANC header active for DID (subaddress 5DH) <3EH
Fig.38 Sliced data formats on the I port in 8-bit mode.
Table 49 Explanation to Fig.38
NAME
EXPLANATION
SAV
SDID
DC
start of active data; see Table 50
sliced data identification: NEP⁽¹⁾, EP⁽²⁾, SDID5 to SDID0, freely programmable via I²C-bus subaddress 5EH, bits 5 to 0, e. g. to be used as
source identifier
Dword count: NEP⁽¹⁾, EP⁽²⁾, DC5 to DC0. DC describes the number of succeeding 32-bit words:
• For SAV/EAV mode DC is fixed to 11 Dwords (byte value 4BH)
• For ANC mode it is: DC = ¹â„₄(C + n), where C = 2 (the two data identification bytes IDI1 and IDI2) and n = number of decoded bytes
according to the chosen text standard.
Note that the number of valid bytes inside the stream can be seen in the BC byte.
IDI1 internal data identification 1: OP⁽³⁾, FID (field 1 = 0, field 2 = 1), LineNumber8 to LineNumber3 = Dword 1 byte 1; see Table 50
IDI2 internal data identification 2: OP⁽³⁾, LineNumber2 to LineNumber0, DataType3 to DataType0 = Dword 1 byte 2; see Table 50
D_{n_m}
D_{DC_4}
CS
BC
Dword number n, byte number m
last Dword byte 4, note: for SAV/EAV framing DC is fixed to 0BH, missing data bytes are filled up; the fill value is A0H
the check sum byte, the check sum is accumulated from the SAV (respectively DID) byte to the D_{DC_4} byte
number of valid sliced bytes counted from the IDI1 byte
EAV end of active data; see Table 50
Notes
1. Inverted EP (bit 7); for EP see note 2.
2. Even parity (bit 6) of bits 5 to 0.
3. Odd parity (bit 7) of bits 6 to 0.