PHN103 Datasheet, PDF (8/12 Pages) NXP Semiconductors – N-channel enhancement mode MOS transistor

Philips Semiconductors
N-channel enhancement mode
MOS transistor
Product specification
PHN103
20
handbook, halfpage
ISD
(A)
16
12
8
4
0
0
MGG336
(1) (2)
(3)
0.4
0.8 _{VSD (V)} 1.2
V_GD = 0.
(1) T_j = 150 °C.
(2) T_j = 25 °C.
(3) T_j = −65 °C.
Fig.10 Source current as a function of source-drain
diode forward voltage; typical values.
10³
handbook, halfpage
(1)
RDSon
(mΩ)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
10²
MGG337
10
0
−2
−4
−6
−8
−10
VGS (V)
V_DS ≥ I_D × R_DSon; T_j = 25 °C.
(1) I_D = 0.1 A.
(2) I_D = 0.5 A.
(3) I_D = 1.0 A.
(4) I_D = 2.75 A.
(5) I_D = 5.5 A.
(6) I_D = 8.5 A.
(7) I_D = 10 A.
(8) I_D = 12 A.
Fig.11 Drain-source on-state resistance as a
function of gate-source voltage;
typical values.
1997 Jun 20
8