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74HCT573PW Datasheet, PDF (8/21 Pages) NXP Semiconductors – Octal D-type transparent latch 3-state
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NXP Semiconductors
74HC573; 74HCT573
Octal D-type transparent latch; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 11.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Min
Max
For type 74HC573
tpd
propagation Dn to Qn; see Figure 7
[1]
delay
VCC = 2.0 V
-
47 150 -
190
-
225 ns
VCC = 4.5 V
-
17 30
-
38
-
45 ns
VCC = 5 V; CL = 15 pF
-
14
-
-
-
-
-
ns
VCC = 6.0 V
-
14 26
-
33
-
38 ns
tpd
propagation LE to Qn; see Figure 8
[1]
delay
VCC = 2.0 V
-
50 150 -
190
-
225 ns
VCC = 4.5 V
-
18 30
-
38
-
45 ns
VCC = 5 V; CL = 15 pF
-
15
-
-
-
-
-
ns
VCC = 6.0 V
-
14 26
-
33
-
38 ns
ten
enable time OE to Qn; see Figure 9
[2]
VCC = 2.0 V
-
44 140 -
175
-
210 ns
VCC = 4.5 V
-
16 28
-
35
-
42 ns
VCC = 6.0 V
-
13 24
-
30
-
36 ns
tdis
disable time OE to Qn; see Figure 9
[3]
VCC = 2.0 V
-
55 150 -
190
-
225 ns
VCC = 4.5 V
-
20 30
-
38
-
45 ns
VCC = 6.0 V
-
16 26
-
33
-
38 ns
tt
transition Qn; see Figure 7
time
VCC = 2.0 V
[4]
-
14 60
-
75
-
90 ns
VCC = 4.5 V
-
5 12
-
15
-
18 ns
VCC = 6.0 V
-
4 10
-
13
-
15 ns
tW
pulse width LE HIGH; see Figure 8
VCC = 2.0 V
80 14 - 100
-
120
-
ns
VCC = 4.5 V
16 5
-
20
-
24
-
ns
VCC = 6.0 V
14 4
-
17
-
20
-
ns
tsu
set-up time Dn to LE; see Figure 10
VCC = 2.0 V
50 11
-
65
-
75
-
ns
VCC = 4.5 V
10 4
-
13
-
15
-
ns
VCC = 6.0 V
9
3
-
11
-
13
-
ns
th
hold time Dn to LE; see Figure 10
VCC = 2.0 V
5
3
-
5
-
5
-
ns
VCC = 4.5 V
5
1
-
5
-
5
-
ns
VCC = 6.0 V
5
1
-
5
-
5
-
ns
CPD
power
CL = 50 pF; f = 1 MHz;
[5] -
26 -
-
-
-
-
pF
dissipation VI = GND to VCC
capacitance
74HC_HCT573
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 15 August 2012
© NXP B.V. 2012. All rights reserved.
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