74HCT573PW Datasheet, PDF (11/21 Pages) NXP Semiconductors – Octal D-type transparent latch 3-state

NXP Semiconductors
74HC573; 74HCT573
Octal D-type transparent latch; 3-state
V_I
OE input
GND
V_CC
output
LOW-to-OFF
OFF-to-LOW
V_OL
V_OH
output
HIGH-to-OFF
OFF-to-HIGH
GND
V_M
t_PLZ
t_PZL
t_PHZ
10%
90%
V_M
t_PZH
V_M
outputs
enabled
outputs
disabled
outputs
enabled
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Fig 9.
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Enable and disable times
LE input
V_M
t _su
t_h
t _su
t_h
Dn input
V_M
001aae084
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 10. Set-up and hold times for data input (Dn) to latch input (LE)
Table 8. Measurement points
Type
74HC573
74HCT573
Input
V_M
0.5V_CC
1.3 V
Output
V_M
0.5V_CC
1.3 V
74HC_HCT573
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 15 August 2012
© NXP B.V. 2012. All rights reserved.
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