74AUP2G00 Datasheet, PDF (8/16 Pages) NXP Semiconductors – Low-power dual 2-input NAND gate

Philips Semiconductors
74AUP2G00
Low-power dual 2-input NAND gate
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol Parameter
Conditions
25 °C
Min Typ^[1] Max
C_L = 5 pF
t_pd
propagation delay
C_L = 10 pF
t_pd
propagation delay
C_L = 15 pF
t_pd
propagation delay
C_L = 30 pF
t_pd
propagation delay
nA, nB to nY; see Figure 7
V_CC = 0.8 V
V_CC = 1.1 V to 1.3 V
V_CC = 1.4 V to 1.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3.0 V to 3.6 V
nA, nB to nY; see Figure 7
V_CC = 0.8 V
V_CC = 1.1 V to 1.3 V
V_CC = 1.4 V to 1.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3.0 V to 3.6 V
nA, nB to nY; see Figure 7
V_CC = 0.8 V
V_CC = 1.1 V to 1.3 V
V_CC = 1.4 V to 1.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3.0 V to 3.6 V
nA, nB to nY; see Figure 7
V_CC = 0.8 V
V_CC = 1.1 V to 1.3 V
V_CC = 1.4 V to 1.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3.0 V to 3.6 V
[2]
-
2.5
2.0
1.6
1.3
1.0
17.5 -
5.3 11.0
3.8 6.8
3.1 5.3
2.5 4.0
2.2 3.6
[2]
-
2.4
2.4
2.0
1.4
1.3
21.0 -
6.1 13.0
4.4 7.9
3.7 6.2
3.0 4.7
2.8 4.3
[2]
-
3.4
2.8
2.0
1.7
1.6
24.5 -
6.9 14.8
5.0 8.9
4.1 7.0
3.5 5.3
3.2 4.9
[2]
-
4.6
3.0
2.6
2.4
2.3
34.8 -
9.2 20.1
6.5 11.8
5.4 9.3
4.6 7.1
4.3 6.5
−40 °C to +125 °C
Unit
Min Max
Max
(85 °C) (125 °C)
-
-
-
ns
2.1
12.2
13.5 ns
1.8
7.8
8.6 ns
1.4
6.2
6.9 ns
1.1
4.7
5.2 ns
1.0
4.2
4.7 ns
-
-
-
ns
2.2
14.4
15.9 ns
2.2
9.2
10.2 ns
1.9
7.3
8.1 ns
1.3
5.6
6.2 ns
1.2
4.9
5.4 ns
-
-
-
ns
3.1
16.5
18.2 ns
2.5
10.5
11.6 ns
2.0
8.3
9.2 ns
1.5
6.4
7.1 ns
1.4
5.7
6.3 ns
-
-
-
ns
4.1
22.6
24.9 ns
2.9
14.0
15.4 ns
2.3
11.1
12.3 ns
2.1
8.5
9.4 ns
2.1
7.6
8.4 ns
74AUP2G00_1
Product data sheet
Rev. 01 — 25 August 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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