BUK116-50L Datasheet, PDF (7/13 Pages) NXP Semiconductors – Logic level TOPFET SMD version of BUK106-50L/S

Philips Semiconductors
Logic level TOPFET
SMD version of BUK106-50L/S
Product specification
BUK116-50L/S
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.4. Normalised limiting power dissipation.
P_D% = 100⋅P_D/P_D(25 ˚C) = f(T_mb)
ID%
120
Normalised Current Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.5. Normalised continuous drain current.
I_D% = 100⋅I_D/I_D(25 ˚C) = f(T_mb); conditions: V_IS = 5 V
ID & IDM / A
1000
BUK116-50L/S
Overload protection characteristics not shown
100
RDS(ON) ^{= VDS/ID}
tp =
10 us
100 us
10
DC
1 ms
10 ms
100 ms
1
1
10
100
VDS / V
Fig.6. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Zth / (K/W)
10
BUK116-50L/S
1 ^D=
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0
P_D
tp
D
=
tp
T
0.001
1E-07
1E-05
1E-03
t/s
T
t
1E-01
Fig.7. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
1E+01
ID / A
200
150
100
BUK116-50L/S
VIS / V =
11
10
9
8
7
6
5
50
4
3
2
0
0
4
8
12
16
20
24
28
32
VDS / V
Fig.8. Typical output characteristics, T_j = 25 ˚C.
ID = f(V_DS); parameter V_IS; t_p = 250 µs & t_p < t_{d sc}
ID / A
50
40
VIS / V = 10
BUK116-50L/S
7
5
4
30
3
20
10
0
0
1
2
VDS / V
Fig.9. Typical on-state characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_IS; t_p = 250 µs
July 1996
7
Rev 1.000