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| BUJ103AD_15 Datasheet, PDF (7/13 Pages) NXP Semiconductors – Silicon diffused power transistor | |||
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NXP Semiconductors
BUJ103AD
Silicon diffused power transistor
IBon
VBB
VCC
LC
VCL(CE)
probe point
LB
DUT
001aab999
10
IC
(A)
8
6
4
2
001aac000
VCEclamp ï£ 1000 V; VCC = 150 V; VBB = ï5 V; LB = 1 ïH;
LC = 200 ïH.
Fig 13. Test circuit for reverse bias safe operating
area
0
0
200
400
600
800
1000
VCEclamp (V)
Tj ï£ Tj(max).
Fig 14. Reverse bias safe operating area
102
IC
(A)
ICM(ma1x0)
IC(max)
1
10â1
001aac001
duty cycle = 0.01
II(3)
tp = 20 μs
(1)
50 μs
100 μs
200 μs
(2)
500 μs
DC
10â2
10â3
1
I(3)
10
III(3)
102
103
VCEclamp (V)
Tmb ï£ 25 ï°C; Mounted with heatsink compound and 30 ï± 5 Newton force on the center of the envelope.
(1) Ptot maximum and Ptot peak maximum lines.
(2) Second breakdown limits.
(3) I = Region of permissible DC operation.
II = Extension for repetitive pulse operation.
III = Extension during turn-on in single transistor converters provided that RBE ï£ 100 ï and tp ï£ 0.6 ïs.
Fig 15. Forward bias safe operating area
7. Package information
Epoxy meets requirements of UL94 V-0 at 1â8 inch.
BUJ103AD
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 â 8 November 2011
© NXP B.V. 2011. All rights reserved.
7 of 13
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