PCF5083 Datasheet, PDF (64/136 Pages) NXP Semiconductors – GSM signal processing IC

Philips Semiconductors
GSM signal processing IC
Objective specification
PCF5083
The MP_CONTROL_BUFF may be used to control several features of the DSP. It consists of 4 parameter fields as given
in Tables 56 and 57.
Table 56 Contents of MP_CONTROL_BUFF
OFFSET
DESCRIPTION
0
time-out_freq: ECLK input frequency divided by 10 kHz. After reset time-out_freq is set to
3 (32.768 kHz clock).
1
eclk_cycle_count: contains number of ECLK cycles spent most recently called procedure. Required for
test purposes only.
2 to 4
proc_trace_buff[2]: for debugging purposes the DSP provides a procedure trace facility. The IDs of the
procedures to be traced must be stored in proc_trace_buff. If any of these procedures is executing, its
corresponding I/O pin (see Table 57) is set to a logic 0.
Table 57 Associated I/O pins
LOCATION
proc_trace_buff[0]
proc_trace_buff[1]
I/O PIN
IO2
IO3
Note
1. If proc_trace_buff[1] is 0, then IO3 is set on errors.
DEFAULT AFTER RESET
17 CP_rx_normal_burst
00 trace errors; note 1
1996 Oct 29
64