PCF5083 Datasheet, PDF (108/136 Pages) NXP Semiconductors – GSM signal processing IC

Philips Semiconductors
GSM signal processing IC
Objective specification
PCF5083
Table 90 Audio Interface Configuration Register
BIT R/W
SYMBOL
0 R/W TX_EN
1 R/W TX_DEST
2 R/W RX_EN
3 R/W RX_SOURCE
4 R/W TX_SLOT0
5 R/W TX_SLOT1
6 R/W TX_SLOT2
7 R/W TX_SLOT3
8 R/W RX_SLOT0
9 R/W RX_SLOT1
10 R/W RX_SLOT2
11 R/W RX_SLOT3
12 R/W TRANS_EN
OPERATION (if bit is set)
Set to a logic 1 to enable the Voice Port transmit
section
Select Voice Port transmit section data port
Set to a logic 1 to enable the Voice Port receive section
Select Voice Port receive section data port
Select IOM^®-2 timeslot for the Voice Port transmit
section
Select IOM^®-2 timeslot for the Voice Port receive
section
Set to a logic 1 to enable the Voice Port transparent
mode
RST = 0
0
0
0
0
0
0
0
0
0
0
0
0
0
RSTx = 0⁽¹⁾
−
−
−
−
−
−
−
−
−
−
−
−
−
Note
1. RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘−’ denotes not affected from reset line.
During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other
registers are undefined and have to be set by the controller.
Table 91 IOM^®-2 Interface Interrupt Flag Register
BIT R/W
SYMBOL
0
R MON0_IBF
1
R MON0_OBE⁽²⁾
2
R MON1_IBF
3
R MON1_OBE⁽²⁾
4
R CI0_IBF
5
R CI0_OBE⁽²⁾
6
R CI1_IBF
7
R CI1_OBE⁽²⁾
OPERATION (if bit is set)
Monitor master 0 input buffer full
Monitor master 0 output buffer empty
Monitor master 1 input buffer full
Monitor master 1 output buffer empty
C/I channel master 0 input buffer full
C/I channel master 0 output buffer empty
C/I channel master 1 input buffer full
C/I channel master 1 output buffer empty
RST = 0 RSTx = 0⁽¹⁾
0
−
0(1)
−
0
−
0(1)
−
0
−
0(1)
−
0
−
0(1)
−
Notes
1. RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘−’ denotes not affected from reset line.
During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other
registers are undefined and have to be set by the controller.
2. These flags change from ‘0’ to ‘1’ after the IOM^®-2 interface was enabled with CLOCK_MODE = 0 and
MASTERx_EN = ‘0’ after the state machined of the monitor/CI master units are in an initial state.
1996 Oct 29
108