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TDA8004AT Datasheet, PDF (6/22 Pages) NXP Semiconductors – IC card interface
Philips Semiconductors
IC card interface
CLKDIV1 1
28 AUX2UC
CLKDIV2 2
27 AUX1UC
5V/3V 3
26 I/OUC
PGND 4
25 XTAL2
S2 5
24 XTAL1
VDDP 6
23 OFF
S1 7
22 GND
TDA8004AT
VUP 8
21 VDD
PRES 9
20 RSTIN
PRES 10
19 CMDVCC
I/O 11
18 n.c.
AUX2 12
17 VCC
AUX1 13
16 RST
CGND 14
15 CLK
FCE659
Fig.2 Pin configuration.
Product specification
TDA8004AT
FUNCTIONAL DESCRIPTION
Throughout this document, it is assumed that the reader is
familiar with ISO7816 norm terminology.
Power supply
The supply pins for the IC are VDD and GND. VDD should
be in the range from 2.7 to 6.5 V. All interface signals with
the microcontroller are referenced to VDD; therefore be
sure the supply voltage of the microcontroller is also at
VDD. All card contacts remain inactive during powering up
or powering down. The sequencer is not activated until
VDD reaches Vth2 + Vhys(th2) (see Fig.3). When VDD falls
below Vth2, an automatic deactivation of the contacts is
performed.
For generating a 5 V ±5% VCC supply to the card, an
integrated voltage doubler is incorporated. This step-up
converter should be separately supplied by VDDP and
PGND (from 4.5 to 6.5 V). Due to large transient currents,
the 2 × 100 nF capacitors of the step-up converter should
have an ESR of less than 100 mΩ, and be located as near
as possible to the IC.
The supply voltages VDD and VDDP may be applied to the
IC in any time sequence.
If a voltage between 7 and 9 V is available within the
application, this voltage may be tied to pin VUP, thus
blocking the step-up converter. In this case, VDDP must be
tied to VDD and the capacitor between pins S1 and S2 may
be omitted.
Voltage supervisor
This block surveys the VDD supply. A defined reset pulse
of approximately 10 ms (tW) is used internally for
maintaining the IC in the inactive mode during powering up
or powering down of VDD (see Fig.3)).
As long as VDD is less than Vth2 + Vhys(th2), the IC will
remain inactive whatever the levels on the command lines.
This also lasts for the duration of tW after VDD has reached
a level higher than Vth2 + Vhys(th2).
The system controller should not attempt to start an
activation sequence during this time.
When VDD falls below Vth2, a deactivation sequence of the
contacts is performed.
2004 May 10
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