TDA8000 Datasheet, PDF (6/24 Pages) NXP Semiconductors – Smart card interface

Philips Semiconductors
Smart card interface
Product specification
TDA8000; TDA8000T
Between steps 3 and 5, a HIGH level on pin RSTIN allows
the CLK signal to be applied to the card. This feature
facilitates a precise count of CLK periods while waiting for
the card to respond to a reset.
After step 5, RSTIN has no further action on CLK.
After step 6, RST is set to the complementary value of
RSTIN.
READ MODE
When the activation sequence is completed and, after the
card has replied to its Answer-to-Reset, theTDA8000
enters the READ mode. Data is exchanged between the
card and the microcontroller via the I/O lines.
When it is required to write to the internal memory of the
card, the circuit is set to the WRITE mode by the
microcontroller.
Cards with EPROM memory require a programming
voltage (V_PP).
V_PP GENERATION
The circuit supports cards with V_PP of 12.5, 15 or 21 V.
The selection of P is achieved by PSEL1 and PSEL2
according to Table 1.
Table 1 Card programming voltage selection
PSEL1
LOW
LOW
HIGH
HIGH
PSEL2
LOW
HIGH
LOW
HIGH
PROGRAMMING
VOLTAGE P
5
12.5
15
21
In order to respect the ISO7816 slopes, the circuit
generates V_PP by charging and discharging an internal
capacitor. The voltage on this capacitor is then amplified
by a power stage gain of 5, powered via an external supply
pin V_H [30 V (max.)].
WRITE MODE (see Fig.7)
When the microcontroller sets the WRITE line (active
LOW), the circuit enters the WRITE mode. V_PP rises from
5 V to the selected value with a typical slew rate of 1 V/µs.
When the write operation is completed, the microcontroller
returns the WRITE line to its HIGH state, and V_PP falls
back to 5 V with the same slew rate.
WRITE has no action outside a session.
DEACTIVATION SEQUENCE (see Fig.8)
When the session is completed, the microcontroller sets
the START line to its HIGH state.
The circuit then executes an automatic deactivation
sequence by counting back the sequencer:
1. Card reset (RST falls to LOW)
2. CLK is stopped
3. No change
4. V_PP falls to 0 V
5. I/O1(µC) and I/O2(µC) become high impedance
6. V_CC falls to 0 V.
The circuit returns to the IDLE mode on the next rising
edge of the sequencer clock.
PROTECTIONS
Main fault conditions are monitored by the circuit:
• Short-circuit on V_CC
• Short-circuit on V_PP
• Over current on I/Os
• Card extraction during transaction
• Overheating problem.
When one of these fault conditions is detected, the circuit
pulls the interrupt line OFF to its active LOW state and
returns to the FAULT mode.
FAULT MODE (see Fig.9)
When a fault condition is written to the microcontroller via
the OFF line, the circuit initiates a deactivation sequence.
After the deactivation sequence has been completed, the
OFF line is reset to its HIGH state when the microcontroller
has reset the START line HIGH, except if the fault
condition was due to a card extraction.
Note
The two other causes of emergency deactivation (Power
failure detected on V_DD or V_SUP) do not act upon OFF.
1996 Dec 12
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