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TDA8000 Datasheet, PDF (5/24 Pages) NXP Semiconductors – Smart card interface
Philips Semiconductors
Smart card interface
Product specification
TDA8000; TDA8000T
FUNCTIONAL DESCRIPTION
Power supply
The circuit operates within a supply voltage range of
6.7 to 18 V. VDD and GND are the supply pins. All card
contacts remain inactive during power-up or power-down,
provided VDD does not rise or fall too fast (0.5 V/ms typ.).
POWER-UP
The logic part is powered first and is in the reset condition
until VDD reaches Vth1. The sequencer is blocked until VDD
reaches Vth4 + Vhys4.
POWER-DOWN
When VDD falls below Vth4, an automatic deactivation of
the contacts is performed.
Voltage supervisor
This block surveys the 5 V supply of the microcontroller
(VSUP) in order to deliver a defined reset pulse and to avoid
any transients on card contacts during power-up or
power-down of VSUP.
The voltage supervisor remains active even if VDD is
powered-down.
POWER-UP
As long as VSUP is below Vth2 + Vhys2 the capacitor CDEL,
connected to the pin DELAY, will be discharged. When
VSUP rises to the threshold level, CDEL will be recharged.
ALARM and ALARM remain active, and the sequencer is
blocked until the voltage on the pin DELAY reaches Vth3.
POWER-DOWN (see Fig.3)
If VSUP falls below Vth2, CDEL will be discharged, ALARM
and ALARM become active, and an automatic deactivation
of the contacts is performed.
Clock circuitry (see Fig.4)
The clock signal (CLK) can be applied to the card by two
different methods:
1. Generation by a crystal oscillator: the crystal
(3 to 11 MHz) is connected to pin XTAL. Its frequency
is divided by two.
2. Use of a signal frequency already present in the
system and connected to the pin CLKIN (up to 8 MHz).
Pin XTAL has to be connected to GND via a 1 kΩ
resistor. In this event, the CLKOUT signal remains
LOW.
In both events the signal is buffered and enabled.
Pin CLKOUT may be used to clock a microcontroller.
The signal (1⁄2fxtal or fxtal if CLKDIV is HIGH) is available
when the circuit is powered up.
State diagram
Once activated, the circuit has six possible modes of
operation:
• Idle
• Activation
• Read
• Write
• Deactivation
• Fault.
Figure 5 shows how these modes are accessible.
IDLE MODE
After reset, the circuit enters the IDLE state. A minimum
number of circuits are active while waiting for the
microcontroller to start a session:
• All card contacts are inactive
• Voltage generators are stopped
• Oscillator is running, providing CLKOUT
• Voltage supervisor is active
• Pins I/O1(µC) and I/O2(µC) are high impedance.
The OFF line is HIGH if a card is present (PRES and
PRES active) and LOW if a card is not present.
ACTIVATION SEQUENCE
From the IDLE mode, the circuit enters the ACTIVATION
mode when the microcontroller sets the START line
(active LOW). The I/O(µC) signals must not be LOW.
The internal circuitry is activated, the internal clock starts
and the following ISO 7816 sequence is performed:
1. VCC rises from 0 to 5 V
2. I/Os are enabled
3. VPP rises from 0 to 5 V
4. No change
5. CLK is enabled
6. RST is enabled.
The typical time interval between two steps is 32 µs for the
first two steps and 64 µs for the other three. Timing is
derived from the internal clock (see Fig.6).
1996 Dec 12
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