74F50728 Datasheet, PDF (6/12 Pages) NXP Semiconductors – Synchronizing cascaded dual positive edge-triggered D-type flip-flop

Philips Semiconductors
Synchronizing cascaded dual positive
edge-triggered D-type flip-flop
Product specification
74F50728
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
CONDITIONS¹
LIMITS
UNIT
MIN TYP² MAX
V_OH
High-level output voltage
V_CC = MIN, V_IH = MIN I_OH = MAX ±10%V_CC 2.5
V
V_IL = MAX,
±5%V_CC 2.7 3.4
V
V_OL
Low-level output voltage
V_CC = MIN, V_IL =
MAX,
I_OL = MAX ±10%V_CC
0.30 0.50 V
V_IH = MIN
±5%V_CC
0.30 0.50 V
V_IK
Input clamp voltage
V_CC = MIN, I_I = I_IK
-0.73 -1.2 V
I_I
Input current at maximum input voltage
V_CC = MAX, V_I = 7.0V
100 µA
I_IH
High–level input current
V_CC = MAX, V_I = 2.7V
20 µA
I_IL
Low–level input current
Dn
V_CC = MAX, V_I = 0.5V
-250 µA
CPn, SDn, RDn
–20 µA
I_OS
Short–circuit output current³
V_CC = MAX, V_O = 2.25V
-60
-150 mA
I_CC
Supply current⁴ (total)
V_CC = MAX
23 34 mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V_CC = 5V, T_amb = 25°C.
3. Not more than one output should be shorted at a time. For testing I_OS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I_OS tests should be performed last.
4. Measure I_CC with the clock input grounded and all outputs open, then with Q and Q outputs high in turn.
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
TEST
CONDITION
T_amb = +25°C
V_CC = +5.0V
C_L = 50pF,
R_L = 500Ω
MIN TYP MAX
LIMITS
T_amb = 0°C to
+70°C
V_CC = +5.0V ± 10%
C_L = 50pF,
R_L = 500Ω
MIN
MAX
T_amb = –40°C to +85°C
V_CC = +5.0V ± 10%
C_L = 50pF,
R_L = 500Ω
MIN
MAX
UNIT
f_max
Maximum clock frequency
Waveform 1 100 145
85
70
t_PLH
Propagation delay
t_PHL
CPn to Qn or Qn
Waveform 1
2.0
2.0
3.8
3.8
6.0
6.0
1.5
2.0
6.5
6.5
1.5
2.0
t_PLH
Propagation delay
t_PHL
SDn RDn to Qn or Qn
Waveform 2
3.5
3.5
5.0
5.0
8.0
8.0
3.0
3.0
9.0
8.5
3.0
3.0
t_sk(o)
Output skew^{1, 2}
Waveform 4
1.5
1.5
NOTES TO AC ELECTRICAL CHARACTERISTICS
1. | t_PLH actual –t_PHL actual | for any one output compare to any other output where N and M are either LH or HL.
2. Skew lines are valid only under same conditions (temperature, V_CC, loading, etc.,).
ns
7.5
7.0
ns
10.5
10.0
ns
1.5
ns
September 14, 1990
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