74F50728 Datasheet, PDF (5/12 Pages) NXP Semiconductors – Synchronizing cascaded dual positive edge-triggered D-type flip-flop

Philips Semiconductors
Synchronizing cascaded dual positive
edge-triggered D-type flip-flop
Product specification
74F50728
FUNCTION TABLE
INTERNAL
INPUTS
REGISTER
SDn
RDn
CPn
Dn
Q
L
H
X
X
H
H
L
X
X
L
L
L
X
X
X
H
H
↑
h
h
H
H
↑
l
l
H
H
L
X
NC
NOTES:
H = High voltage level
h = High voltage level one setup time prior to low–to–high
clock transition
L = Low voltage level
l = Low voltage level one setup time prior to low–to–high
clock transition
OUTPUTS
OPERATING MODE
Qn
Qn
H
L
Asynchronous set
L
H
Asynchronous reset
H
H
Undetermined*
H
L
Load ”1”
L
H
Load ”0”
NC
NC
Hold
NC=
X=
*=
↑=
** =
No change from the previous setup
Don’t care
This setup is unstable and will change when either set of
reset return to the high–level
Low–to–high clock transition.
Data entering the flip–flop requires two clock cycles to
arrive at the output (see logic diagram)
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V_CC
V_IN
I_IN
V_OUT
Supply voltage
Input voltage
Input current
Voltage applied to output in high output state
–0.5 to +7.0
V
–0.5 to +7.0
V
–30 to +5
mA
–0.5 to V_CC
V
I_OUT
Current applied to output in low output state
40
mA
T_amb
Operating free air temperature range
Commercial range
0 to +70
°C
Industrial range
–40 to +85
°C
T_stg
Storage temperature range
–65 to +150
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
V_CC
V_IH
V_IL
I_Ik
I_OH
I_OL
T_amb
Supply voltage
High–level input voltage
Low–level input voltage
Input clamp current
High–level output current
Low–level output current
Operating free air temperature range
MIN
4.5
2.4
Commercial range
0
Industrial range
–40
LIMITS
NOM
5.0
MAX
5.5
0.8
–18
–3
20
+70
+85
UNIT
V
V
V
mA
mA
mA
°C
°C
September 14, 1990
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