PHN1011 Datasheet, PDF (5/7 Pages) NXP Semiconductors – TrenchMOS transistor Logic level FET

Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHN1011
Gate-source voltage, VGS (V)
15
14 ^{ID = 25A}
13 _{Tj = 25 C}
12
11 ^{VDD = 15 V}
10
9
8
7
6
5
4
3
2
1
0
0
5
10 15 20 25 30 35 40 45 50
Gate charge, QG (nC)
Fig.13. Typical turn-on gate-charge characteristics.
V_GS = f(Q_G); parameter V_DS
Source-Drain Diode Current, IF (A)
50
VGS = 0 V
45
40
35
30
150 C
25
Tj = 25 C
20
15
10
5
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
Source-Drain Voltage, VSDS (V)
Fig.14. Typical reverse diode current.
I_F = f(V_SDS); conditions: V_GS = 0 V; parameter T_j
June 1999
5
Rev 1.100