PHN1011 Datasheet, PDF (4/7 Pages) NXP Semiconductors – TrenchMOS transistor Logic level FET

Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHN1011
Drain current, ID (A)
50
VDS > ID X RDS(ON)
45
40
35
30
25
20
15
10
150 C
5
Tj = 25 C
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
Transconductance, gfs (S)
50
45
40
Tj = 25 C
VDS > ID X RDS(ON)
35
150 C
30
25
20
15
10
5
0
0
5
10
15
20
25
30
35
40
Drain current, ID (A)
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 25 V
Normalised On-state Resistance
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
Junction temperature, Tj (C)
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j)
Threshold Voltage, VGS(TO) (V)
2.25
2
maximum
1.75
1.5
typical
1.25
1
minimum
0.75
0.5
0.25
0
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
Junction Temperature, Tj (C)
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 0.25 mA; V_DS = V_GS
Drain current, ID (A)
1.0E-01
VDS = 5 V
1.0E-02
1.0E-03
1.0E-04
minimum
typical
maximum
1.0E-05
1.0E-06
0
0.5
1
1.5
2
2.5
3
Gate-source voltage, VGS (V)
Fig.11. Sub-threshold drain current.
I_D = f(V_GS); conditions: T_j = 25 ˚C; V_DS = V_GS
Capacitances, Ciss, Coss, Crss (pF)
10000
1000
Ciss
Coss
Crss
100
0.1
1
10
100
Drain-Source Voltage, VDS (V)
Fig.12. Typical capacitances, C_iss, C_oss, C_rss.
C = f(V_DS); conditions: V_GS = 0 V; f = 1 MHz
June 1999
4
Rev 1.100