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TDA8358J Datasheet, PDF (4/20 Pages) NXP Semiconductors – Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier
Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS with east-west amplifier
Product specification
TDA8358J
PINNING
SYMBOL
INA
INB
VP
OUTB
INEW
VGND
EWGND
OUTEW
VFB
OUTA
GUARD
FEEDB
COMP
PIN
DESCRIPTION
1 input A
2 input B
3 supply voltage
4 output B
5 east-west input
6 vertical ground
7 east-west ground
8 east-west output
9 flyback supply voltage
10 output A
11 guard output
12 feedback input
13 compensation input
handbook, halfpage
INA 1
INB 2
VP 3
OUTB 4
INEW 5
VGND 6
TDA8358J
EWGND 7
OUTEW 8
VFB 9
OUTA 10
GUARD 11
FEEDB 12
COMP 13
MGL867
The die has been glued to the metal block of the package. If the metal
block is not insulated from the heatsink, the heatsink shall only be
connected directly to pin VGND.
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Vertical output stage
The vertical driver circuit has a bridge configuration.
The deflection coil is connected between the
complimentary driven output amplifiers. The differential
input circuit is voltage driven. The input circuit is specially
designed for direct connection to driver circuits delivering
a differential signal but it is also suitable for single-ended
applications. The output currents of the driver device are
converted to voltages by the conversion resistors
RCV1 and RCV2 (see Fig.3) connected to pins INA
and INB. The differential input voltage is compared with
the voltage across the measuring resistor RM, providing
internal feedback information. The voltage across RM is
proportional with the output current. The relationship
between the differential input current and the output
current is defined by:
2 × Ii(dif)(p-p) × RCV = Io(p-p) × RM
The output current should measure 0.5 to 3.2 A (p-p) and
is determined by the value of RM and RCV. The allowable
input voltage range is 100 mV to 1.6 V for each input. The
formula given does not include internal bondwire
resistances. Depending on the value of RM and the internal
bondwire resistance (typical value 50 mΩ) the actual value
of the current in the deflection coil will be about 5% lower
than calculated.
Flyback supply
The flyback voltage is determined by the flyback supply
voltage VFB. The principle of two supply voltages (class G)
allows to use an optimum supply voltage VP for scan and
an optimum flyback supply voltage VFB for flyback, thus
very high efficiency is achieved. The available flyback
output voltage across the coil is almost equal to VFB, due
to the absence of a coupling capacitor which is not
required in a bridge configuration. The very short
rise and fall times of the flyback switch are determined
mainly by the slew-rate value of more than 300 V/µs.
Protection
The output circuit contains protection circuits for:
• Too high die temperature
• Overvoltage of output A.
1999 Dec 22
4