TDA8358J Datasheet, PDF (14/20 Pages) NXP Semiconductors – Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier

Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS with east-west amplifier
Product specification
TDA8358J
handbook, halfpage
TEW(M)
TTRv(M)
Rth(EW-P1)
10.5 K/W
PEW
TP1(M)
Rth(TRv-P1)
5.2 K/W
PTRv(M)
Rth(P1-c)
2.2 K/W
Ptot
Tc
MGL872
Fig.5 Equivalent thermal resistance network.
EXAMPLE
Measured or known values:
• The east-west power dissipation: P_EW = 3 W
• The vertical power dissipation: P_V = 6 W
• The maximum (peak) power dissipation of the most
critical transistor: P_TRv(peak) = 5 W
• The case temperature: T_c = 85 °C.
The IC total power dissipation is:
P_tot = P_EW + P_V = 6 + 3 = 9 W
It should be noted that the allowed IC total power
dissipation is P_tot = 15 W (maximum value).
The maximum (peak) temperature T_P1(peak) is given by:
• T_P1(peak) = T_c + (P_EW + P_TRv(peak)) × R_th(P1-c)
= 85 + (3 + 5) × 2.2 = 102.6 °C
The maximum (peak) junction temperatures for the output
circuits are given by:
• T_j(EW)(peak) = T_P1(peak) + R_th(EW-P1) × P_EW
= 102.6 + 10.5 × 3 = 134.1 °C
• T_j(TRv)(peak) = T_P1(peak) + R_th(TRv-P1) × P_TRv(peak)
= 102.6 + 5.2 × 5 = 128.6 °C
1999 Dec 22
14