BUK545-60H Datasheet, PDF (4/8 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
Product specification
BUK545-60H
ID / A
100
15
10 ₆
80
60
40
BUK5Y5-60H
5
4.5
4
3.5
20
3
VGS / V = 2.5
0
0
2
4
6
8
10
VDS / V
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
RDS(ON) / Ohm
0.2
2.5 3
3.5
4
0.15
BUK5Y5-60H
4.5
VGS / V = 5
0.1
10
0.05
6
0
0
Fig.6.
15
20
40
60
80
100
ID / A
Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
ID / A
100
BUK5Y5-60H
80
60
40
20
Tj / C =
-40
25
150
0
0
1
2
3
4
5
6
7
8
VGS / V
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
gfs / S
40
BUK5Y5-60H
30
20
10
Tj / C =
-40
25
150
0
0
20
40
60
80
100
ID / A
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 10 V
a
1.5
Normalised RDS(ON) = f(Tj)
1.0
0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j); I_D = 20 A; V_GS = 5 V
VGS(TO) / V
2
1
max.
typ.
min.
0
-60 -40 -20 0
20 40 60 80 100 120 140
Tj / C
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 1 mA; V_DS = V_GS
August 1994
4
Rev 1.000