BUK545-60H Datasheet, PDF (3/8 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
Product specification
BUK545-60H
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER
W_DSS
Drain-source non-repetitive
unclamped inductive turn-off
energy
CONDITIONS
I_D = 41 A ; V_DD ≤ 25 V ; T_hs = 25 ˚C
V_GS = 5 V ; R_GS = 50 Ω
MIN. TYP. MAX. UNIT
-
-
90 mJ
120 ^PD%
110
Normalised Power Derating
with heatsink compound
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Ths / C
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_hs)
ID%
120
110
Normalised Current Derating
with heatsink compound
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Ths / C
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_hs); conditions: V_GS ≥ 5 V
ID / A
1000
BUK545-60H
100
RDS(ON) ^{= VDS/ID}
10
DC
1
tp =
10 us
100 us
100 us
1 ms
110mmss
100 ms
10 ms
100 ms
0.1
0.1
1
10
100
VDS / V
Fig.3. Safe operating area. T_hs = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Zth / (K/W)
10
D=
0.5
1 _0.2
0.1
0.05
0.1 _0.02
BUKx45-lv
0.01
0
PD
tp
D
=
tp
T
0.001
1E-07
1E-05
1E-03
t/s
T
t
1E-01
1E+01
Fig.4. Transient thermal impedance.
Z_{th j-hs} = f(t); parameter D = t_p/T
August 1994
3
Rev 1.000