BUJ302AX_15 Datasheet, PDF (4/13 Pages) NXP Semiconductors – NPN power transistor

NXP Semiconductors
BUJ302AX
NPN power transistor
10²
I_C
(A)
I_CM(ma¹_x⁰₎
I_C(max)
1
10^−1
001aac001
duty cycle = 0.01
II₍₃₎
t_p = 20 μs
(1)
50 μs
100 μs
200 μs
(2)
500 μs
DC
10^−2
I₍₃₎
10^−3
1
10
10²
Fig 4.
1)Ptot maximum and Ptot peak maximum lines
2)Second breakdown limits
3) I = Region of permissable DC operation
II = Extension for repetitive pulse operation
III = Extension during turn-on in single transistor converters
provided that RBE ≤ 100 Ω and tp ≤ 0.6 μs
Forward bias safe operating area for Tmb ≤ 25 °C
III₍₃₎
10³
V_CEclamp (V)
BUJ302AX
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 28 March 2011
© NXP B.V. 2011. All rights reserved.
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