74HC7046A Datasheet, PDF (4/38 Pages) NXP Semiconductors – Phase-locked-loop with lock detector

Philips Semiconductors
Phase-locked-loop with lock detector
Product specification
74HC/HCT7046A
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C;
SYMBOL PARAMETER
CONDITIONS
f_o
VCO centre frequency
C1 = 40 pF; R1 = 3 kΩ; V_CC = 5 V
C_I
input capacitance (pin 5)
C_PD
power dissipation capacitance per package notes 1 and 2
Notes
1. Applies to the phase comparator section only (VCO disabled).
For power dissipation of VCO and demodulator sections see Figs 20, 21 and 22.
2. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
TYPICAL
UNIT
HC HCT
19 19 MHz
3.5 3.5 pF
24 24 pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
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