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SC16IS740 Datasheet, PDF (39/62 Pages) NXP Semiconductors – Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support | |||
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NXP Semiconductors
SC16IS740/750/760
Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
An address on the network is seven bits long, appearing as the most signiï¬cant bits of the
address byte. The last bit is a direction (R/W) bit. A â0â indicates that the master is
transmitting (write) and a â1â indicates that the master requests data (read). A complete
data transfer, comprised of an address byte indicating a âwriteâ and two data bytes is
shown in Figure 20.
SDA
SCL
S
START
condition
0 to 6
address
7
8
R/W ACK
Fig 20. A complete data transfer
0 to 6
data
7
8
ACK
0 to 6
data
7
8
ACK
P
STOP
condition
002aab046
When an address is sent, each device in the system compares the ï¬rst seven bits after the
START with its own address. If there is a match, the device will consider itself addressed
by the master, and will send an acknowledge. The device could also determine if in this
transaction it is assigned the role of a slave receiver or slave transmitter, depending on the
R/W bit.
Each node of the I2C-bus network has a unique seven-bit address. The address of a
microcontroller is of course fully programmable, while peripheral devices usually have
ï¬xed and programmable address portions.
When the master is communicating with one device only, data transfers follow the format
of Figure 20, where the R/W bit could indicate either direction. After completing the
transfer and issuing a STOP condition, if a master would like to address some other
device on the network, it could start another transaction by issuing a new START.
Another way for a master to communicate with several different devices would be by using
a ârepeated STARTâ. After the last byte of the transaction was transferred, including its
acknowledge (or negative acknowledge), the master issues another START, followed by
address byte and dataâwithout effecting a STOP. The master may communicate with a
number of different devices, combining âreadsâ and âwritesâ. After the last transfer takes
place, the master issues a STOP and releases the bus. Possible data formats are
demonstrated in Figure 21. Note that the repeated START allows for both change of a
slave and a change of direction, without releasing the bus. We shall see later on that the
change of direction feature can come in handy even when dealing with a single device.
In a single master system, the repeated START mechanism may be more efï¬cient than
terminating each transfer with a STOP and starting again. In a multimaster environment,
the determination of which format is more efï¬cient could be more complicated, as when a
master is using repeated STARTs it occupies the bus for a long time and thus preventing
other devices from initiating transfers.
SC16IS740_750_760_5
Product data sheet
Rev. 05 â 16 November 2006
© NXP B.V. 2006. All rights reserved.
39 of 62
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