TDA8046 Datasheet, PDF (30/48 Pages) NXP Semiconductors – Multi-mode QAM demodulator

Philips Semiconductors
Multi-mode QAM demodulator
Product specification
TDA8046
7.1.11 I²C-BUS INTERFACE
The TDA8046 is controlled by an I²C-bus. For programming, there is one module address (7 bits) and the R/W bit for
selecting READ or WRITE mode. It should be noted that the TDA8046 starts up in accordance with to the settings defined
in Tables 7, 8 and 9.
Table 6 Slave address
A6
A5
A4
A3
A2
A1
A0
R/W
0
0
0
1
1
1
A0
X
Table 7 WRITE (R/W = 0)
FUNCTION
DAC current
inversion/general
Demodulator
DAC/OFFS/switch
Digital test/output
formatter
Digital loop filter
B.W.
Digital loop filter
B.W.
Lock detector
threshold
Lock detector
window size
AGC detector
threshold
Equalizer mode
Equalizer tap FFEI
Equalizer steps
ADD D7
00 AGCI
D6
CLKI
01 INP
RLF
02 ANAS OFFS
03
−
−
04 DCA7 DCA6
05 FSOL
−
06 LDT7 LDT6
07
−
−
08 ATH7 ATH6
09
−
−
0A FFEI07 FFEI06
0B
−
FSTP2
D5
CARI
OUTB
AGCB
−
DCA5
−
LDT5
−
ATH5
EAR
FFEI05
FSTP1
D4
OUTE
OUTA
AGCA
−
DCA4
−
LDT4
−
ATH4
FFEL
FFEI04
FSTP0
D3
DEM
INVD
CLKB
OUTF
DCA3
−
LDT3
−
ATH3
EDFE
FFEI03
−
D2
NYQ
CONC
CLKA
TSEL2
DCA2
DCB2
LDT2
−
ATH2
EFFE
FFEI02
DSTP2
D1
DPHR
D0
RST
CONB
CARB
TSEL1
CONA
CARA
TSEL0
DCA1
DCA0
DCB1
DCB0
LDT1
LDT0
WS1
WS0
ATH1
ATH0
EFC
FFEI01
DSTP1
PRESET
FFEI00
DSTP0
1996 Nov 19
30