TDA4885 Datasheet, PDF (30/56 Pages) NXP Semiconductors – 150 MHz video controller with I2C-bus

Philips Semiconductors
150 MHz video controller with I²C-bus
Product specification
TDA4885
11 I²C-BUS PROTOCOL
Table 1 Slave address
A6⁽¹⁾
A5⁽¹⁾
1
0
A4⁽¹⁾
0
A3⁽¹⁾
0
A2⁽¹⁾
1
A1⁽¹⁾
0
A0⁽¹⁾
0
W⁽²⁾
0
Notes
1. Address bit.
2. Write bit.
Table 2 Slave receiver format
S⁽¹⁾
SLAVE ADDRESS A⁽²⁾
SUBADDRESS A⁽³⁾
DATA BYTE A⁽⁴⁾
P⁽⁵⁾
Notes
1. START condition.
2. A = acknowledge.
3. All subaddresses within the range 00H to 09H are automatically incremented. The subaddress counter wraps around
from 09H to 00H. The subaddress 0FH is reserved for test purposes under production. Do not use it. Subaddresses
outside the range 00H to 0FH are acknowledged by the device but neither auto-increment nor any other internal
operation takes place.
4. N data bytes with auto-increment of subaddresses.
5. STOP condition.
1997 Nov 25
30