TDA4885 Datasheet, PDF (16/56 Pages) NXP Semiconductors – 150 MHz video controller with I2C-bus

Philips Semiconductors
150 MHz video controller with I²C-bus
Product specification
TDA4885
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX.
Crosstalk at signal outputs (channel 1: pin 30; channel 2: pin 25; channel 3: pin 20)
α_ct(tr)
α_ct(f)
transient crosstalk suppression input rise/fall time = 1 ns;
note 26
crosstalk suppression by
frequency
f = 50 MHz
f = 100 MHz
10
25 −
25
30 −
10
20 −
Internal feedback reference voltage; see Fig.15 and note 27
V_ref(n)
V_ref(p)
∆V_ref/∆T
∆V_ref/∆V_P
internal reference voltage for
negative feedback polarity
fixed internal reference voltage
for positive feedback polarity
variation of V_ref(n) and V_ref(p) in
the temperature range
variation of V_ref(n) and V_ref(p)
with supply voltage V_P
FFH; FPOL = 0
00H; FPOL = 0
FPOL = 1
T_amb = −20 to +70 °C
7.6 V ≤ V_P ≤ 8.8 V
3.8
4.0 4.2
5.6
5.8 6.1
0.6
0.7 0.8
0
−
±1.0
0
−
±1.0
External reference voltages (REF₁: pin 32; REF₂: pin 27; REF₃: pin 22); see Fig.16 and note 28
V_{32, 27, 22}
∆V_{32, 27, 22}/∆T
∆V_{32, 27, 22}/∆V_P
R_{32, 27, 22}
I_{32, 27, 22}
I_{32, 27, 22}
external reference voltage
(equal to internal reference
voltage with control bit
FPOL = 0 )
variation of V_{32, 27, 22} in the
temperature range
variation of V_{32, 27, 22} with
supply voltage V_P
output resistance
maximum sink current
maximum source current
FFH
00H
T_amb = −20 to +70 °C
7.6 V ≤ V_P ≤ 8.8 V
3.8
4.0 4.2
5.6
5.8 6.1
0
−
±1.0
0
−
±1.0
−
90 −
−
−
400
−
−330 −280
Output clamping, feedback inputs (channel 1: pin 31; channel 2: pin 26; channel 3: pin 21)
I_{31, 26, 21(max)}
V_{30, 25, 20rbl(min)}
V_{30, 25, 20rbl(max)}
∆V_bl(CRT)
∆V_bl(lf)
t_W11
t_d11(clamp)l
maximum input current
minimum reference black level
minimum pedestal black level
maximum reference black level
maximum pedestal black level
black level variation at CRT
during output clamping;
V₁₁ > 3.5 V; V_{31, 26, 21} = 0.5 V
PEDST = 0; V₁₁ > 3.5 V
PEDST = 1; V₁₁ > 3.5 V
PEDST = 0; V₁₁ > 3.5 V
PEDST = 1; V₁₁ > 3.5 V
note 29
black level variation between
clamping pulses related to
nominal colour signal
line frequency 60 kHz;
10% duty cycle
width of clamping pulse
measured at V₁₁ = 3 V;
see Fig.8
delay between clamping input
at pin 11 (leading edge) and
start of internal output clamping
pulse
see Fig.8
−500
0.01
0.01
2.4
2.4
0
−
1
−
−100 −60
0.1 0.5
0.1 0.5
2.8 4
2.8 4
40 200
0.1 0.5
−
−
−
300
UNIT
dB
dB
dB
V
V
V
%
%
V
V
%
%
Ω
µA
µA
nA
V
V
V
V
mV
%
µs
ns
1997 Nov 25
16