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TDA8752 Datasheet, PDF (3/36 Pages) NXP Semiconductors – Triple high speed Analog-to-Digital Converter ADC | |||
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Philips Semiconductors
Triple high speed Analog-to-Digital
Converter (ADC)
Product speciï¬cation
TDA8752
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
VCCA
VDDD
VCCD
VCCO
VCCA(PLL)
VCCO(PLL)
ICCA
IDDD
ICCD
ICCO
analog supply voltage
logic supply voltage
digital supply voltage
output stages supply voltage
analog PLL supply voltage
output PLL supply voltage
analog supply current
logic supply current
digital supply current
output stages supply current
for R, G and B channels 4.75
for I2C-bus and 3-wire 4.75
4.75
for R, G and B channels 4.75
4.75
4.75
â
for I2C-bus and 3-wire â
â
fCLK = 100 MHz;
â
ramp input
ICCA(PLL) analog PLL supply current
â
ICCO(PLL) output PLL supply current
â
fCLK
maximum clock frequency
TDA8752/6
60
TDA8752/8
100
fref(PLL)
fVCO
INL
DNL
âGamp/T
B
tset
DRPLL
Ptot
jPLL(rms)
PLL reference clock frequency
VCO output clock frequency
DC integral non linearity
DC differential non linearity
ampliï¬er gain stability as a function of
temperature
ampliï¬er bandwidth
settling time of the ADC block plus AGC
PLL divider ratio
total power consumption
maximum PLL phase jitter (RMS value)
15
12
from analog input to
â
digital output; full-scale;
ramp input;
fCLK = 100 MHz
from analog input to
â
digital output; full-scale;
ramp input;
fCLK = 100 MHz
Vref = 2.5 V with
â
100 ppm/°C maximum
â3 dB; Tamb = 25 °C
250
input signal settling
â
time < 1 ns; Tamb = 25 °C
100
fCLK = 100 MHz;
â
ramp input
fref = 66.67 kHz;
â
fCLK = 100 MHz
TYP.
5.0
5.0
5.0
5.0
5.0
5.0
120
1.0
40
6
28
5
â
â
â
â
±0.5
±0.5
â
â
â
â
1.0
0.3
MAX.
5.25
5.25
5.25
5.25
5.25
5.25
â
â
â
â
UNIT
V
V
V
V
V
V
mA
mA
mA
mA
â
mA
â
mA
â
MHz
â
MHz
280 kHz
100 MHz
±1.5 LSB
±1.0 LSB
200 ppm/°C
â
MHz
6
ns
4 095
â
W
â
ns
1999 Mar 09
3
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