SI4884 Datasheet, PDF (3/12 Pages) NXP Semiconductors – TrenchMOS™ logic level FET

Philips Semiconductors
SI4884
TrenchMOS™ logic level FET
120
Pder
(%)
80
03aa17
120
I _der
(%)
80
03aa25
40
40
0
0
50
100
P_der = _P-------^P----^t--^o---^t------- × 100%
t o t ( 25 ^°C )
150
200
Tsp (ºC)
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
102
ID
(A)
Limit RDSon = VDS / ID
10
1
10-1
0
0
50
100
150
200
T_sp (^oC)
V_GS ≥ 5 V
I_der = -_I-------^I--^D--------- × 100%
D ( 25 ^°C )
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
003aaa160
tp =
10 µs
100 µs
1 ms
DC
10 ms
1s
10-2
10-1
1
10
VDS (V)
102
T_sp = 25 °C; I_DM is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09582
Product data
Rev. 02 — 12 April 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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