PHP225 Datasheet, PDF (3/12 Pages) NXP Semiconductors – Dual P-channel enhancement mode MOS transistor

Philips Semiconductors
Dual P-channel enhancement
mode MOS transistor
Product specification
PHP225
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN. MAX. UNIT
Per P-channel
V_DS
V_GSO
I_D
I_DM
P_tot
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
peak drain current
total power dissipation
T_stg
storage temperature
T_j
operating junction temperature
Source-drain diode
I_S
source current (DC)
I_SM
peak pulsed source current
open drain
T_s ≤ 80 °C
note 1
T_s = 80 °C; note 2
T_amb = 25 °C; note 3
T_amb = 25 °C; note 4
T_amb = 25 °C; note 5
T_s ≤ 80 °C
note 1
−
−30
V
−
±20
V
−
−2.3
A
−
−10
A
−
2
W
−
2
W
−
1
W
−
1.3
W
−65
+150 °C
−
150
°C
−
−1.25 A
−
−5
A
Notes
1. Pulse width and duty cycle limited by maximum junction temperature.
2. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same time.
3. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R_{th a-tp}
(ambient to tie-point) of 27.5 K/W.
4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R_{th a-tp}
(ambient to tie-point) of 90 K/W.
5. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with
an R_{th a-tp} (ambient to tie-point) of 90 K/W.
1997 Jun 20
3